Efficient Serial Message-Passing Schedules for LDPC Decoding
نویسندگان
چکیده
منابع مشابه
Convergence Analysis of Serial Message-Passing Schedules for LDPC Decoding
Serial decoding schedules for low-density parity-check (LDPC) codes are described and analyzed. Conventionally, in each iteration all the variable nodes and subsequently all the check nodes send messages to their neighbors (“flooding schedule”). In contrast, in the considered methods, the updating of the nodes is implemented according to a serial schedule. The evolution of the decoding algorith...
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We address noisy message-passing decoding of lowdensity parity-check (LDPC) codes over additive white Gaussian noise channels. Message-passing decoders in which certain processing units iteratively exchange messages are common for decoding LDPC codes. The exchanged messages are in general subject to internal noise in hardware implementation of these decoders. We model the internal decoder noise...
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The convergence rate of LDPC decoding is comparatively slower than turbo code decoding: 25 LDPC iterations versus 8-10 iterations for turbo codes. Recently, Mansour proposed a ‘turbo-schedule’ to improve the convergence rate of LDPC decoders. In this letter, we first extend the turbo-scheduling principle to the check messages. Second, we show analytically that the convergence rate of both turbo...
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The goal of the present paper is the derivation of a framework for the finite-length analysis of message-passing iterative decoding of low-density parity-check codes. To this end we introduce the concept of graph-cover decoding. Whereas in maximum-likelihood decoding all codewords in a code are competing to be the best explanation of the received vector, under graph-cover decoding all codewords...
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The VLSI implementation complexity of a low density parity check (LDPC) decoder is largely influenced by interconnect and the storage requirements. Here, the proposed layout-aware layered decoder architecture utilizes the data–reuse properties of min-sum, layered decoding and structured properties of array LDPC codes. This results in a significant reduction of logic and interconnects requiremen...
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ژورنال
عنوان ژورنال: IEEE Transactions on Information Theory
سال: 2007
ISSN: 0018-9448
DOI: 10.1109/tit.2007.907507